|
|
|
EditText
|
BrowseFacets
|
RecentChanges
|
FindPage
|
Database Wiki
| by
John Sequeira 
|
"TRANGO technology enables processor secured virtualization for major 32/64 bit RISC architectures : ARM, MIPS, PowerPC, SH, configurable cores and FPGA soft-cores. It is based on a para-virtualization approach (no instruction emulation): it ensures full predictability and close-to-native performance.
TRANGO hypervisors are based on TRANGO technology and specialized for each CPU architecture.
A TRANGO hypervisor is a very compact micro-kernel dividing CPU resources and address space into virtual MMU-enabled processors. Guest Operating Systems run in CPU user-mode and use one or multiple virtual processors (for Symmetric Multi-Processing OSs).
TRANGO also acts as a very efficient portability layer for guest OSs and RTOSs, providing support for a wide range of processors without any change to the OS's source code.
TRANGO hypervisor features are:
- Full predictability and close-to-native performance
- Highly optimized and compact code (<20 kilo-bytes, ROM-able, secured boot)
- Support of multi-core and multi-thread CPU architectures, and variably-sized memory pages
- High-performance messaging between virtual processors (guest OS)
- Linux 2.6 and eCos 2.0 ports with developer community
- Support of most guest OS native drivers without porting efforts
- Fully compatible with guest OS native tools, and simultaneous support of TRANGO development, monitoring and debugging tools
- Eclipse Integrated Development Environment plug-ins for TRANGO tools"